ARD2  1.00 for Rev B. Hardware
Airbag Reference Demonstrator using MPC5604P
ME.h
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00001 
00020 #ifndef _ME_H
00021 #define _ME_H
00022 #include "derivative.h"
00023 /*
00024  **************************************************************
00025  * Defines, Macros and Typedefs 
00026  **************************************************************/
00027 /*** Constant Macros ***/
00028 /* Default Yes and No defines */
00029 #ifndef TRUE
00030  #define TRUE (1u)
00031 #endif
00032 #ifndef CLEAR
00033  #define CLEAR (0u)
00034 #endif
00035 #ifndef BITS_IN_NIBBLE
00036  #define BITS_IN_NIBBLE (4u)
00037 #endif
00038 #ifndef BITS_IN_BYTE
00039  #define BITS_IN_BYTE (8u)
00040 #endif
00041 #ifndef BYTES_IN_16
00042  #define BYTES_IN_16  (2u)
00043 #endif
00044 #ifndef BYTES_IN_32
00045  #define BYTES_IN_32  (4u)
00046 #endif
00047 
00048 #ifndef BIT_DEFINITION
00049  #define BIT_DEFINITION
00050  #define BIT0  (1u << 0u)
00051  #define BIT1  (1u << 1u)
00052  #define BIT2  (1u << 2u)
00053  #define BIT3  (1u << 3u)
00054  #define BIT4  (1u << 4u)
00055  #define BIT5  (1u << 5u)
00056  #define BIT6  (1u << 6u)
00057  #define BIT7  (1u << 7u)
00058  #define BIT8  (1u << 8u)
00059  #define BIT9  (1u << 9u)
00060  #define BIT10 (1u << 10)
00061  #define BIT11 (1u << 11)
00062  #define BIT12 (1u << 12)
00063  #define BIT13 (1u << 13)
00064  #define BIT14 (1u << 14)
00065  #define BIT15 (1u << 15)
00066  #define BIT16 (1u << 16)
00067  #define BIT17 (1u << 17)
00068  #define BIT18 (1u << 18)
00069  #define BIT19 (1u << 19)
00070  #define BIT20 (1u << 20)
00071  #define BIT21 (1u << 21)
00072  #define BIT22 (1u << 22)
00073  #define BIT23 (1u << 23)
00074  #define BIT24 (1u << 24)
00075  #define BIT25 (1u << 25)
00076  #define BIT26 (1u << 26)
00077  #define BIT27 (1u << 27)
00078  #define BIT28 (1u << 28)
00079  #define BIT29 (1u << 29)
00080  #define BIT30 (1u << 30)
00081  #define BIT31 (1u << 31)
00082 #endif
00083 
00084 /* Mode Entry Hardware register overwrite */
00085 #define ME_TRANSITION      (ME.GS.B.S_MTRANS)
00086 #define ME_REGULATOR_READY (ME.GS.B.S_MVR)
00087 
00088 /* Max values */
00089 #define MAX_PERIPH_INDEX_POSSIBLE      (144u)
00090 #define MAX_PERIPH_CONFIG_POSSIBLE     (0x80u)
00091 
00092 /* Peripherals connected to the ME */
00093 #define ME_DSPI0      (4u)
00094 #define ME_DSPI1      (5u)
00095 #define ME_DSPI2      (6u)
00096 #define ME_DSPI3      (7u)
00097 #define ME_FLEXCAN0   (16u)
00098 #define ME_FLEXRAY0   (24U)
00099 #define ME_SAFETYPORT (26u)
00100 #define ME_ADC0       (32u)
00101 #define ME_ADC1       (33u)
00102 #define ME_CTU0       (35u)
00103 #define ME_ETIMER0    (38u)
00104 #define ME_ETIMER1    (39U)
00105 #define ME_PWM0       (41u)
00106 #define ME_LINFLEX0   (48U)
00107 #define ME_LINFLEX1   (49u)
00108 #define ME_PIT        (92u)
00109 
00110 /* Values for PCTL Config - to be used in w/ ME_PERIPHERAL_PRESETS below */
00111 #define RUN_ALWAYS_ON    (PERIPH_ALWAYS_ON)
00112 #define RUN_ALWAYS_OFF   (PERIPH_ALWAYS_OFF)
00113 #define LP_ALWAYS_ON     (PERIPH_ALWAYS_ON  << 3u)
00114 #define LP_ALWAYS_OFF    (PERIPH_ALWAYS_OFF << 3u)
00115 #define DEBUG_FREEZE_ON  (0x40u)
00116 #define DEBUG_FREEZE_OFF (0x00u)
00117 
00118 /* Enabled Modes */
00119 #define STOP0_DISABLED  (0x00000000u)
00120 #define STOP0_ENABLED   (0x00000400u)
00121 #define HALT0_DISABLED  (0x00000000u)
00122 #define HALT0_ENABLED   (0x00000100u)
00123 #define RUN3_DISABLED   (0x00000000u)
00124 #define RUN3_ENABLED    (0x00000080u)
00125 #define RUN2_DISABLED   (0x00000000u)
00126 #define RUN2_ENABLED    (0x00000040u)
00127 #define RUN1_DISABLED   (0x00000000u)
00128 #define RUN1_ENABLED    (0x00000020u)
00129 #define TEST_DISABLED   (0x00000000u)
00130 #define TEST_ENABLED    (0x00000002u)
00131 
00132 /* Values for MCU Mode configuration */
00133 #define PDO_OFF         (0x00000000u)
00134 #define PDO_ON          (0x00800000u)
00135 #define MVRON_OFF       (0x00000000u)
00136 #define MVRON_ON        (0x00100000u)
00137 #define DATA_FLASH_OFF  (0x00040000u)
00138 #define DATA_FLASH_LP   (0x00080000u)
00139 #define DATA_FLASH_ON   (0x000C0000u)
00140 #define CODE_FLASH_OFF  (0x00010000u)
00141 #define CODE_FLASH_LP   (0x00020000u)
00142 #define CODE_FLASH_ON   (0x00030000u)
00143 #define PLL1_OFF        (0x00000000u)
00144 #define PLL1_ON         (0x00000080u)
00145 #define PLL0_OFF        (0x00000000u)
00146 #define PLL0_ON         (0x00000040u)
00147 #define XOSC0_OFF       (0x00000000u)
00148 #define XOSC0_ON        (0x00000020u)
00149 #define IRC_16MHZ_OFF   (0x00000000u)
00150 #define IRC_16MHZ_ON    (0x00000010u)
00151 #define SYSCLK_IS_IRC   (0x00000000u)
00152 #define SYSCLK_IS_XOSC  (0x00000002u)
00153 #define SYSCLK_IS_PLL0  (0x00000004u)
00154 #define SYSCLK_IS_PLL1  (0x00000005u)
00155 #define SYSCLK_IS_OFF   (0x0000000Fu)
00156 
00157 /* To switch modes */
00158 #define CHANGE_MODE_KEY_1 (0x00005AF0u)
00159 #define CHANGE_MODE_KEY_2 (0x0000A50Fu)
00160 #define SWITCH_MODE_TIMEOUT ((uint16_t)0x1000u)
00161 
00162 /* Module Entry error codes */
00163 #define ME_HW_NOT_READY     ((uint8_t)BIT0)
00164 #define ME_INVALID_INDEX    ((uint8_t)BIT1)
00165 #define ME_INVALID_RUN_MODE ((uint8_t)BIT2)
00166 #define ME_OP_MODE_CHANGE_DIDNT_OCCUR ((uint8_t)BIT3)
00167 
00168 /*** Function Macros ***/
00169 
00170 /*** Enums ***/
00171 enum ME_VALID_OP_MODES
00172 {
00173   RESET_MODE = 0, TEST_MODE, SAFE_MODE, DRUN_MODE, RUN0_MODE, 
00174   RUN1_MODE, RUN2_MODE, RUN3_MODE, HALT0_MODE, RESERVED_MODE, 
00175   STOP0_MODE
00176 };
00177 enum ME_PERIPHERAL_PRESETS
00178 {
00179   PERIPH_ALWAYS_ON = 0, PERIPH_ALWAYS_OFF
00180 };
00181 
00182 
00183 /*** TypeDefs ***/
00184 
00185 /*
00186  **************************************************************
00187  * Declarations 
00188  **************************************************************/
00189 /*** Extern ***/
00190 
00191 /*** Globals ***/
00192 
00193 /*** Static Globals ***/
00194 
00195 /*
00196  **************************************************************
00197  * Function Prototypes 
00198  **************************************************************/
00199 /*
00200  ******************************************************************************
00201  *
00202  * Function:          u8fnInitDefaultPeripheralPresets()
00203  *
00204  */
00215 uint8_t u8fnInitDefaultPeripheralPresets(void);
00216 /*
00217  ******************************************************************************
00218  *
00219  * Function:          u8fnConfigPeripheralForMCUModePreset()
00220  *
00221  */
00229 uint8_t u8fnConfigPeripheralForMCUModePreset(const uint8_t u8PeripheralIndex, \
00230                                              const uint8_t u8ConfigurationIndex);
00231 /*
00232  ******************************************************************************
00233  *
00234  * Function:          u8fnCurrentOperationMode()
00235  *
00236  */
00244 uint8_t u8fnCurrentOperationMode(void);
00245 /*
00246  ******************************************************************************
00247  *
00248  * Function:          u8fnInitDefaultOpModes()
00249  *
00250  */
00260 uint8_t u8fnInitDefaultOpModes(void);
00261 /*
00262  ******************************************************************************
00263  *
00264  * Function:          u8fnSwitchOpModes()
00265  *
00266  */
00276 uint8_t u8fnSwitchOpModes(const uint8_t u8Mode);
00277 #endif /* _FILENAME_H */